By [prepared by IEC Technical Committee 56, Dependability].
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Additional resources for INTERNATIONAL STANDARD CEI IEC 61025 - Fault tree analysis (FTA)
1. Graphical components of a fault tree are as follows: a) fault tree logic symbol (gates); b) gate input connection lines; c) intermediate event descriptions; d) transfer in or out symbols; e) primary event symbols. All relevant events should be included in the fault tree. Such events should include the effects of environmental or other stress conditions to which the item might be subjected including the software, controls and status monitoring; those which are possible during operation, even if outside the design specification.
F(t) = 1 – R(t) (2) The probability of an unfavourable outcome of an OR gate (“system”) consisting of n independent input gates or events is: FS (t ) = 1 − (1 − F1(t )) ⋅ (1 − F2 (t )) ⋅ ...... ⋅ (1 − Fi (t )) ⋅ ...... ⋅ (1 − Fn (t )) (3) The system fails when any of the components (blocks) fail. An example of an OR gate is shown in Figure 2. In Figure 2, and all subsequent figures in this clause, the relevant failure mode of a component is the failure mode which, as an input event, causes occurrence of the output event.
Dans ce cas, une porte dynamique est utilisée. Lorsque la redondance est telle que la condition de succès du système est que k de n blocs identiques reste opérationnel, l’expression mathématique pour la non-fiabilité, comme utilisée dans l’AAP est la suivante: R S (t ) = 1 − k −1 n! ⋅( n − i)! ⋅ [R0 (t )]i ⋅ [1 − R0 (t )]n−i i =0 ou FS ( t ) = (6) k −1 n! ⋅(n − i)! ⋅ [1 − F0 (t )]i ⋅ [F0 (t )]n−i i =0 Dans l’AAP, cette combinaison d’événements est représentée par la porte de vote majoritaire, où le nombre de vote est m = n – k + 1 et le symbole dans la porte correspondante, m désigne combien d’événements doivent prendre place pour que l'événement se propage dans l'arbre.